Index

NameLast modifiedSize
Parent Directory  -
02_Binary_Numbers.ppt2014-09-03 15:20 4.9M
03_Logic_Gates.ppt2014-09-03 15:20 4.3M
04_No_Class.ppt2014-09-03 15:21 118K
05_Boolean_Algebra.ppt2014-09-03 15:21 3.5M
06_Synthesis.ppt2014-09-03 15:21 2.5M
07_NAND_and_NOR.ppt2014-09-17 13:46 6.0M
08_Design_Examples.ppt2014-09-17 13:47 7.4M
09_Transistor_Implementation.ppt2014-09-17 13:48 1.3M
10_Intro_to_Verilog.ppt2014-09-17 13:48 8.1M
11_K-Maps.ppt2014-09-17 13:48 1.9M
12_Minimization.ppt2014-09-17 13:48 1.8M
13_Functions_and_Circuits.ppt2014-09-17 14:12 4.0M
14_Examples.ppt2014-09-17 14:12 2.6M
15_Midterm_Review.ppt2014-09-17 14:12 139K
16_Midterm1_No_Lecture.ppt2014-09-17 14:13 118K
17_Addition_of_Unsigned_Numbers.ppt2014-10-20 14:00 1.2M
18_Signed_Numbers.ppt2014-10-20 14:00 2.3M
19_Fast_Adders.ppt2014-10-20 14:00 4.0M
20_Multiplication.ppt2014-10-20 14:00 6.9M
21_Floating_Point_Numbers.ppt2014-10-20 14:01 2.9M
22_Multiplexers.ppt2014-10-20 14:02 1.9M
23_Decoders_and_Encoders.ppt2014-10-20 14:03 2.0M
24_Code_Converters.ppt2014-10-20 14:04 1.0M
25_Latches.ppt2014-10-20 14:18 4.7M
26_D_Flip-Flops.ppt2014-10-20 14:18 1.4M
27_T_and_JK_Flip-Flops.ppt2014-10-20 14:18 440K
28_Parade_of_Flip-Flops.ppt2014-10-20 14:18 1.4M
29_Registers_and_Counters.ppt2014-10-20 14:18 2.6M
30_Midterm_Review.ppt2014-10-20 14:19 139K
31_Midterm2_No_Lecture.ppt2014-10-20 14:19 118K
32_Solved_Problems.ppt2014-11-10 20:06 1.8M
33_Basic_Design_Steps.ppt2014-11-10 20:08 1.3M
34_State_Assignment_Problem.ppt2014-11-10 20:13 4.8M
35_Mealy_State_Model.ppt2014-11-10 20:14 1.6M
36_Serial_Adder.ppt2014-11-14 18:01 4.7M
37_State_Minimization.ppt2014-11-10 20:16 2.2M
38_Designing_a_Counter.ppt2014-11-10 20:19 3.6M
39_Arbiter_Circuit.ppt2014-11-10 20:19 676K
40_Analysis_of_SSC.ppt2014-12-01 13:31 3.3M
41_ASM_Charts.ppt2014-12-03 17:37 2.4M
43_Register_Machines.ppt2014-12-08 18:21 30M
44_Simple_Processor.ppt2014-12-10 17:57 4.3M
45_Final_Review.ppt2014-12-12 17:49 8.7M