Index

NameLast modifiedSize
Parent Directory  -
02_Binary_Numbers.ppt2014-01-15 16:05 4.9M
03_Logic_Gates.ppt2014-01-17 12:07 4.3M
04_No_Class.ppt2014-01-22 14:50 118K
05_Boolean_Algebra.ppt2014-01-22 14:49 3.5M
06_Synthesis.ppt2014-01-24 14:04 2.5M
07_NAND_and_NOR.ppt2014-01-29 12:56 5.0M
08_Design_Examples.ppt2014-01-29 12:56 2.4M
09_Verilog_part1.ppt2014-01-31 15:48 8.0M
10_Verilog_part2.pptx2014-02-12 16:02 1.5M
11_K-Maps.ppt2014-02-07 10:56 1.9M
12_Minimization.ppt2014-02-07 10:56 1.8M
13_Functions_and_Circuits.ppt2014-02-12 16:00 4.0M
14_Examples.ppt2014-02-12 16:01 2.6M
15_Addition_of_Unsigned_Numbers.ppt2014-02-14 17:04 1.2M
16_Signed_Numbers.ppt2014-02-28 14:43 2.3M
17_Fast_Adders.ppt2014-02-28 14:43 4.0M
18_Midterm_Review.ppt2014-02-28 14:43 139K
19_Midterm1_No_Lecture.ppt2014-02-28 14:43 118K
20_Floating_Point_Numbers.ppt2014-02-28 14:43 2.9M
21_Multiplication.ppt2014-02-28 14:44 3.2M
22_Multiplexers.ppt2014-03-05 14:01 1.9M
23_Decoders_and_Encoders.ppt2014-03-05 14:01 2.0M
24_Code_Converters.ppt2014-03-05 14:02 1.0M
25_Latches.ppt2014-03-28 16:00 4.6M
26_D_Flip-Flops.ppt2014-03-28 16:00 1.4M
27_T_and_JK_Flip-Flops.ppt2014-03-28 16:00 435K
28_Parade_of_Flip-Flops.ppt2014-03-28 16:00 1.4M
29_Registers_and_Counters.ppt2014-04-04 15:56 2.6M
30_Midterm_Review.ppt2014-04-04 15:56 139K
31_Midterm2_No_Lecture.ppt2014-04-04 15:56 118K
32_Solved_Problems.ppt2014-04-21 15:10 1.1M
33_Basic_Design_Steps.ppt2014-04-25 13:57 905K
34_State_Assignment_Problem.ppt2014-04-25 13:47 4.7M
35_Mealy_State_Model.ppt2014-04-21 15:05 1.6M
36_Serial_Adder.ppt2014-04-21 15:04 1.2M
37_State_Minimization.ppt2014-04-21 15:01 2.2M
38_Designing_a_Counter.ppt2014-04-21 14:52 3.6M
39_Arbiter_Circuit.ppt2014-04-25 13:10 676K
40_Analysis_of_SSC.ppt2014-04-18 15:45 3.3M
41_ASM_Charts.ppt2014-04-28 15:40 1.2M
43_Register_Machines.ppt2014-04-28 15:42 30M
44_Simple_Processor.ppt2014-05-02 15:09 3.8M
45_Final_Review.ppt2014-05-02 15:09 8.7M