Index

NameLast modifiedSize
Parent Directory  -
02_Binary_Numbers.ppt2016-08-24 15:45 4.9M
03_Logic_Gates.ppt2016-08-28 11:16 3.1M
04_Boolean_Algebra.ppt2016-08-31 12:56 3.5M
05_Synthesis.ppt2016-08-31 13:15 2.8M
06_NAND_and_NOR.ppt2016-09-02 16:00 8.2M
07_No_Class.ppt2016-09-07 15:54 118K
08_Design_Examples.ppt2016-09-09 15:46 7.5M
09_Intro_to_Verilog.ppt2016-09-09 15:54 8.1M
10_K-Maps.ppt2016-09-12 15:14 2.1M
11_Minimization.ppt2016-09-14 16:02 2.2M
12_Functions_and_Circuits.ppt2016-09-16 15:57 4.9M
13_Examples.ppt2016-09-19 15:56 2.6M
14_Midterm_Review.ppt2016-09-19 15:20 139K
15_Midterm1_No_Lecture.ppt2016-09-19 15:21 118K
16_Addition_of_Unsigned_Numbers.ppt2016-09-23 23:46 1.2M
17_Signed_Numbers.ppt2016-09-28 16:01 2.8M
18_Fast_Adders.ppt2016-09-30 16:01 4.8M
19_Multiplication.ppt2016-10-03 15:58 6.9M
20_Floating_Point_Numbers.ppt2016-10-05 18:47 3.5M
21_Multiplexers.ppt2016-10-07 14:13 2.8M
22_Decoders_and_Encoders.ppt2016-10-10 16:05 2.5M
23_Code_Converters.ppt2016-10-12 16:04 1.7M
24_Latches.ppt2016-10-14 15:58 6.0M
25_D_Flip-Flops.ppt2016-10-17 16:11 2.5M
26_T_and_JK_Flip-Flops.ppt2016-10-19 17:26 590K
27_Registers.ppt2016-10-21 17:26 3.7M
28_Counters.ppt2016-10-24 16:02 3.4M
29_Midterm_Review.ppt2016-10-19 14:23 150K
30_Midterm2_No_Lecture.ppt2016-10-19 14:23 118K
31_Solved_Problems.ppt2016-10-31 16:00 2.2M
32_Basic_Design_Steps.ppt2016-11-02 17:41 2.3M
33_State_Assignment_Problem.ppt2016-11-04 15:59 6.1M
34_Mealy_State_Model.ppt2016-11-09 15:33 1.6M
35_Serial_Adder.ppt2016-11-11 15:35 4.7M
36_State_Minimization.ppt2016-11-11 16:04 2.2M
37_Designing_a_Counter.ppt2016-11-11 15:40 3.7M
38_Analysis_of_SSC.ppt2016-11-11 15:49 3.3M
39_Arbiter_Circuit.ppt2016-11-28 14:18 812K
40_ASM_Charts.ppt2016-11-28 16:00 6.3M
41_Register_Machines.ppt2016-11-30 15:56 30M
43_Simple_Processor.ppt2016-12-05 15:35 6.7M
44_Simple_Processor_part2.ppt2016-12-07 15:58 6.7M
45_Final_Review.ppt2016-12-09 15:55 8.6M