Index

NameLast modifiedSize
Parent Directory  -
01_Intro_and_Overview.ppt2020-08-18 13:41 4.8M
02_Binary_Numbers.ppt2020-08-18 13:51 4.0M
03_Logic_Gates.ppt2020-08-21 16:21 3.8M
04_Boolean_Algebra.ppt2020-08-26 15:21 7.7M
05_Synthesis.ppt2020-08-26 19:10 2.9M
06_NAND_and_NOR.ppt2020-08-28 17:40 8.5M
07_Design_Examples.ppt2020-08-31 16:24 10M
08_Intro_to_Verilog.ppt2020-09-02 16:22 1.9M
09_K-Maps.ppt2020-09-04 16:19 3.2M
10_Minimization.ppt2020-09-07 16:21 5.8M
11_Functions_and_Circuits.ppt2020-09-09 18:55 6.0M
12_Examples.ppt2020-09-11 17:39 5.6M
13_Addition_of_Unsigned_Numbers.ppt2020-09-14 16:15 1.4M
14_Signed_Numbers.ppt2020-09-16 17:34 3.8M
15_Midterm1_No_Lecture.ppt2020-10-26 17:32 101K
16_Fast_Adders.ppt2020-09-21 16:20 6.3M
17_Multiplication.ppt2020-09-23 16:23 8.9M
18_Floating_Point_Numbers.ppt2020-10-02 17:35 4.9M
19_Multiplexers.ppt2020-09-28 16:22 2.2M
20_Decoders_and_Encoders.ppt2020-09-30 16:22 5.2M
21_Code_Converters.ppt2020-10-02 17:32 7.1M
22_Latches.ppt2020-10-05 16:07 5.8M
23_D_Flip-Flops.ppt2020-10-07 17:45 3.0M
24_T_and_JK_Flip-Flops.ppt2020-10-09 17:38 4.6M
25_Registers_and_Register_Files.ppt2020-10-12 16:22 4.9M
26_Counters.ppt2020-10-13 23:55 7.4M
27_Examples_with_Counters.pptx2020-10-16 16:11 2.4M
28_Basic_Design_Steps.ppt2020-10-21 15:38 4.3M
29_State_Assignment_Problem.ppt2020-10-21 17:33 14M
30_Midterm2_No_Lecture.ppt2020-10-15 15:54 101K
31_Mealy_State_Model.ppt2020-10-26 16:23 9.0M
32_Serial_Adder_and_Arbiter_Circuit.ppt2020-10-28 16:12 5.6M
33_State_Minimization.ppt2020-10-30 16:21 2.5M
34_Designing_a_Counter.ppt2020-11-02 18:16 3.6M
35_Analysis_of_SSC.ppt2020-11-04 16:17 3.0M
36_ASM_Charts.ppt2020-11-06 16:22 7.2M
37_Register_Machines.ppt2020-11-09 16:17 2.4M
38_i281_CPU_Architecture.ppt2020-11-11 16:20 35M
39_Assembly_Language.ppt2020-11-16 19:24 12M
40_ALU_and_PC.ppt2020-11-16 16:19 25M
41_Intersection_of_Software_and Hardware.ppt2020-11-18 18:35 16M
41b_Final_Review.ppt2020-11-18 18:52 11M
42_Assembly_Examples.ppt2020-11-20 18:23 6.0M