Index

NameLast modifiedSize
Parent Directory  -
02_Binary_Numbers.pdf2021-08-25 14:49 18M
03_Logic_Gates.pdf2021-08-27 15:44 16M
04_Boolean_Algebra.pdf2021-08-29 15:19 7.8M
05_Synthesis.pdf2021-09-01 15:34 6.5M
06_NAND_and_NOR.pdf2021-09-03 15:38 13M
07_No_Class.pdf2021-09-03 15:39 39K
08_Design_Examples.pdf2021-09-10 15:14 54M
09_Intro_to_Verilog.pdf2021-09-11 23:30 3.4M
10_K-Maps.pdf2021-09-13 15:46 4.5M
11_Minimization.pdf2021-09-15 15:51 5.0M
12_Functions_and_Circuits.pdf2021-09-17 15:41 5.1M
13_Examples.pdf2021-09-20 14:58 7.4M
14_Midterm_Review.pdf2021-09-22 15:54 39K
15_Midterm1_No_Lecture.pdf2021-09-27 15:57 39K
16_Addition_of_Unsigned_Numbers.pdf2021-09-27 15:55 11M
17_Signed_Numbers.pdf2021-09-29 15:58 6.3M
18_Fast_Adders.pdf2021-10-01 16:11 6.1M
19_Multiplication.pdf2021-10-04 15:57 35M
20_Floating_Point_Numbers.pdf2021-10-06 15:49 79M
21_Multiplexers.pdf2021-10-08 14:09 55M
22_Decoders_and_Encoders.pdf2021-10-11 15:50 8.1M
23_Code_Converters.pdf2021-10-15 11:59 6.4M
24_Latches.pdf2021-10-18 14:29 25M
25_D_Flip-Flops.pdf2021-10-18 15:33 17M
26_T_and_JK_Flip-Flops.pdf2021-10-19 22:40 36M
27_Registers_and_Register_Files.pdf2021-10-25 13:29 25M
28_Registers_and_Counters.pdf2021-10-25 13:32 25M
29_Midterm_Review.pdf2021-11-01 15:25 39K
30_Midterm2_No_Lecture.pdf2021-11-01 15:26 39K
31_Examples_with_Counters.pdf2021-11-01 15:23 6.4M
32_Basic_Design_Steps.pdf2021-11-03 15:42 6.8M
33_State_Assignment_Problem.pdf2021-11-05 15:35 13M
34_Mealy_State_Model.pdf2021-11-08 14:59 9.6M
35_Serial_Adder_and_Arbiter_Circuit.pdf2021-11-10 15:05 4.0M
36_State_Minimization.pdf2021-11-12 15:35 2.3M
37_Designing_a_Counter.pdf2021-11-15 14:19 3.7M
38_Analysis_of_SSC.pdf2021-11-17 14:43 4.0M
39_ASM_Charts.pdf2021-11-19 15:04 6.9M
40_Register_Machines.pdf2021-11-29 14:48 8.3M
41_i281_CPU_Architecture.pdf2021-12-01 16:00 79M
42_Assembly_Language.pdf2021-12-03 15:55 16M
43_ALU_and_PC.pdf2021-12-08 15:54 21M
44_Intersection_of_Software_and_Hardware.pdf2021-12-08 15:44 16M
45_Assembly_Examples.pdf2021-12-10 14:10 22M