Index

NameLast modifiedSize
Parent Directory  -
02_Binary_Numbers.pdf2022-08-26 11:13 21M
03_Logic_Gates.pdf2022-08-26 11:53 20M
04_Boolean_Algebra.pdf2022-08-29 12:08 8.0M
05_Synthesis.pdf2022-09-06 15:54 2.9M
06_NAND_and_NOR.pdf2022-09-02 14:51 12M
07_No_Class.pdf2022-09-02 14:52 38K
08_Design_Examples.pdf2022-09-07 15:19 26M
09_Intro_to_Verilog.pdf2022-09-09 14:56 2.3M
10_K-Maps.pdf2022-09-12 15:28 5.3M
11_Minimization.pdf2022-09-14 15:31 2.2M
12_Functions_and_Circuits.pdf2022-09-16 15:50 3.2M
13_Examples.pdf2022-09-19 09:50 5.6M
14_Midterm_Review.pdf2022-09-26 15:55 38K
15_Midterm1_No_Lecture.pdf2022-09-26 15:56 38K
16_Addition_of_Unsigned_Numbers.pdf2022-09-26 15:53 4.9M
17_Signed_Numbers.pdf2022-10-05 23:40 4.8M
18_Fast_Adders.pdf2022-10-05 23:56 6.1M
19_Multiplication.pdf2022-10-03 16:14 13M
20_Floating_Point_Numbers.pdf2022-10-05 22:29 10M
21_Multiplexers.pdf2022-10-07 14:39 25M
22_Decoders_and_Encoders.pdf2022-10-12 15:50 4.0M
23_Code_Converters.pdf2022-10-12 15:49 4.7M
24_Latches.pdf2022-10-14 14:36 24M
25_D_Flip-Flops.pdf2022-10-17 16:07 15M
26_T_and_JK_Flip-Flops.pdf2022-10-19 15:32 33M
27_Registers_and_Register_Files.pdf2022-10-21 13:47 19M
28_Registers_and_Counters.pdf2022-10-24 16:17 17M
29_Midterm_Review.pdf2022-10-30 20:29 38K
30_Midterm2_No_Lecture.pdf2022-10-30 20:29 38K
31_Examples_with_Counters.pdf2022-10-30 22:09 4.2M
32_Basic_Design_Steps.pdf2022-11-02 15:19 3.3M
33_State_Assignment_Problem.pdf2022-11-04 15:43 8.2M
34_Mealy_State_Model.pdf2022-11-07 16:05 6.3M
35_Serial_Adder_and_Arbiter_Circuit.pdf2022-11-09 10:08 16M
36_State_Minimization.pdf2022-11-11 12:48 2.6M
37_Designing_a_Counter.pdf2022-11-11 12:51 2.6M
38_Analysis_of_SSC.pdf2022-11-11 13:52 2.8M
39_ASM_Charts.pdf2022-11-18 11:57 4.0M
40_Register_Machines.pdf2022-11-28 16:13 1.0M
41_i281_CPU_Architecture.pdf2022-11-30 15:21 36M
42_Assembly_Language.pdf2022-12-02 15:44 17M
43_ALU_and_PC.pdf2022-12-05 16:16 7.1M
44_Intersection_of_Software_and Hardware.pdf2022-12-07 16:21 5.4M
45_Assembly_Examples.pdf2022-12-09 15:30 22M