Index

NameLast modifiedSize
Parent Directory  -
02_Binary_Numbers.pdf2023-08-23 15:59 26M
03_Logic_Gates.pdf2023-08-24 17:01 13M
04_Boolean_Algebra.pdf2023-08-28 16:06 6.7M
05_Synthesis.pdf2023-09-01 14:52 3.1M
06_NAND_and_NOR.pdf2023-09-01 14:53 13M
07_No_Class.pdf2023-09-01 14:06 38K
08_Design_Examples.pdf2023-09-06 14:54 26M
09_Intro_to_Verilog.pdf2023-09-08 16:18 2.3M
10_K-Maps.pdf2023-09-11 16:19 5.3M
11_Minimization.pdf2022-09-14 15:31 2.2M
12_Functions_and_Circuits.pdf2023-09-18 16:18 3.7M
13_Examples.pdf2023-09-18 15:36 5.6M
14_Midterm_Review.pdf2023-09-26 16:49 38K
15_Midterm1_No_Lecture.pdf2023-09-26 16:51 38K
16_Addition_of_Unsigned_Numbers.pdf2023-09-26 16:48 5.2M
17_Signed_Numbers.pdf2023-09-27 15:18 6.2M
18_Fast_Adders.pdf2023-09-29 16:17 6.2M
19_Multiplication.pdf2023-10-02 16:13 13M
20_Floating_Point_Numbers.pdf2023-10-04 16:14 11M
21_Multiplexers.pdf2023-10-06 14:53 28M
22_Decoders_and_Encoders.pdf2023-10-09 16:13 4.0M
23_Code_Converters.pdf2023-10-11 16:08 4.8M
24_Latches.pdf2023-10-16 15:10 24M
25_D_Flip-Flops.pdf2023-10-16 15:11 20M
26_T_and_JK_Flip-Flops.pdf2023-10-17 13:37 33M
27_Registers_and_Register_Files.pdf2023-10-20 15:47 19M
28_Registers_and_Counters.pdf2023-10-23 14:42 17M
29_Midterm_Review.pdf2023-10-30 16:16 38K
30_Midterm2_No_Lecture.pdf2023-10-30 16:15 38K
31_Examples_with_Counters.pdf2023-10-30 16:13 4.2M
32_Basic_Design_Steps.pdf2023-11-01 16:10 3.3M
33_State_Assignment_Problem.pdf2023-11-03 15:39 8.3M
34_Mealy_State_Model.pdf2023-11-06 15:27 6.3M
35_Serial_Adder_and_Arbiter_Circuit.pdf2023-11-09 10:39 3.2M
36_State_Minimization.pdf2023-11-10 14:40 2.6M
37_Designing_a_Counter.pdf2023-11-10 14:47 2.6M
38_Analysis_of_SSC.pdf2023-11-10 14:50 2.8M
39_ASM_Charts.pdf2023-11-17 16:10 4.1M
40_Register_Machines.pdf2023-11-27 16:05 1.0M
41_i281_CPU_Architecture.pdf2023-11-29 16:17 39M
42_Assembly_Language.pdf2023-11-29 23:06 18M
43_ALU_and_PC.pdf2023-12-04 15:37 7.1M
44_Intersection_of_Software_and Hardware.pdf2023-12-05 17:44 5.4M
45_Assembly_Examples.pdf2023-12-08 14:39 22M