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Catalog Description

Cpr E 583. Reconfigurable Computing Systems. (Same as Com S 583.) (3-0) Cr. 3. Prereq: Background in computer architecture, design, and organization. Introduction to reconfigurable computing, FPGA technology and architectures, spatial computing architectures, systolic and bit serial architectures, adaptive network architectures, bus-based and static dynamic rearrangeable interconnection structure architectures, reconfigurable computing architectures for processors.

Course Outline

The emergence of high capacity reconfigurable devices is spurring a revolution in general-purpose computing. The adaptive computing systems can tailor and dedicate functional units and interconnect to take advantage of application dependent dataflow. Furthermore, machines have been proposed that dynamically change their configuration with changing data sets and algorithm needs. The reconfigurability at pipeline level, datapath level and memory level offer an interesting paradigm for general purpose computing. This course discusses the basic foundations of reconfigurable computing, and its applications in general purpose computing and adaptive network architectures.

Syllabus

  1. Introduction to Adaptive/Reconfigurable Computing [1 week]
    • What is adaptive computing and why is it interesting?
    • Computing Requirements, area, and VLSI scaling
    • Instructions
    • Introduction to FPGA
    • Custom Computing Machine Overview
    • Comparing Computing Machines
  2. FPGA Technology and Architectures [3 weeks]
    • LUT devices and mapping (Look-up Table)
    • ALU design
    • Placement and partitioning algorithms
    • Routing algorithms
  3. Spatial Computing Architectures [3 weeks]
    • Systolic Architectures and Algorithms
    • Systolic Structures
    • Bit Serial
  4. Adaptive Network Architectures [3 weeks]
    • Static and dynamic network
    • Routing/embedding
    • Rearrangeable networks
    • Reconfigurable bus
  5. Reconfigurable Computing Architectures [5 weeks]
    • Reconfigurable coprocessor based architectures
    • Compiler technology for coprocessor based architectures
    • Mapping/scheduling algorithms
    • Reconfigurable pipelines
    • Reconfigurable memories & caches